Efficiency of Parallel Processing in Multi-Core Processors
Abstract. This paper evaluates efficiency in the parallelization of multi-core processors. Early computer systems would work in series. With the aim of enhancing efficiency, processors were directed towards parallelization. This study evaluates parallelization efficiency at the level of multi-core processors, compares the efficiency and productivity of Super Scalar with Pipe line, Super Pipe line techniques, discusses parallelization techniques and examines challenges that may affect these techniques.
David A. Petterson and John L. Hennssy, “Computer organization & Design : the hardware/software interface”, Elsevier, computer organization, USA, ISBN 964-7343-17-5, 2009.
Donald E. knuth, “the art of computer programming”, Intruduction to combinatorial algorithms and Boolean functions”, Vol. 4, 2008 I.
D.M. Tullsen, S.J. Eggers, and H.M. Levy, "Simultaneous Multithreading: Maximizing On-Chip Parallelism" In 22nd Annual International Symposium on Computer Architecture, June, 1995.
D.M. Tullsen, S.J. Eggers, J.S. Emaer, H.M. Levy, J.L. Lo, and R.L. Stamm, "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor," In 23rd Annual International Symposium on Computer Architecture, May, 1996
F.J. Seinstra, D.koelma, J.M. Geusebroek, “A software architecture for user transparent parallel image processing”, Elsevier, locate, parco, university of Amsterdam parallel computing 28, PP: 967,993,2002.
J. CHoe, M. Ehrich,”StarR-Jr: A Parralel System For Commodity Technology“,In Proc. of 7th Transputer / Occam Int. Conf. Tokyo, japan, nov1996.
James E. Smith, Gurindar S. Sohi “The Microarchitecture of Superscalar Processors”, Proceedings of the IEEE, December 1995.
L. Hammond, B. A. Nayfeh, K. Olukotun, “A Single-chip Multi Processor”, IEEE, Computer Special Issue on "Billion-Transistor Processors, Sept 1997.
Lynne, William Frankel, “Multi-Core Processor: past & future”, Computer Science Department, Intel, Ben-Gurion University, May 2008, Website: http//www.cs.bgu.ac.il/~frankel/Mult- icore08/index.html
M.J. Quinn, “Parallel Computing theory and practice”, 2nd Ed. McGraw-Hill, 1994.
M. Moris Mano, “Computer System Architecture”, Prentice - Hall, Computers, pages: 220-245, 19 M. R. Zargham,”Computer Architecture: Single and Parallel Systems”, Prentice Hall,1996.
Paul Pop, “Advanced Computer Architecture”, Institutionen for Dataveten Skap(IDA), Linkopings Universited, webpage: http://www.ida.Liu.se/~TDTS51/~Paul-pop/, Lectures 1 -12, December 2000.
Paul Pop,” Superscalar Architecture”, lecture 7-8, 2002. Paul “Intel Thurrott, and AMD http://www.windowsitpro.com/ article/ performance/ Intel-and-AMD-2005-microprocessors.
Prof. Bill Dally, “EE482C: Advanced Computer Organization Stream Processor Architectures”, Standford university, Thursday, May 2002.
Prof. Roy M. Turner, “Superscalar Architecture”, University of Maine, USA, COS.335:15, 2007.
S. Beiki, “On the complexity of Branch Prediction”, Secumania Security Group (SSG), Secum ania.net, 2008.
S. V. Adve and M. D. Hill., "Weak Ordering, A New DeŞnition.", Proceedings of the 17th Annual International Symposium on Computer Architecture”, PP: 2–14, May 1990.
T. Tamura, M. Ouguchi, M. Kisturegawa, ”Parallel Data base Processing on 100 Node PC Cluster”, institute of Industrial Scince, University of Tokyo,1997.
W., Stallings, “Computer Organization and Architecture”, chapter 1-16, 5th Edition, Prentice Hall International, Inc, 2000.
W. Stallings, ”Data and Computer Communication”, Prentice - Hall,1997.
Zhao, X., Jin, P., Yue, L., “ Research on the COM-based reusability of evaluating models”, proceeding of the IEEE,Conf. on Information Reuse and Integrat, Dept of Computer Science & Technology, Univ. of Science & Technology of China, China, , Performance evaluation of parallel system, ISBN: 978-1-4244-2659-1, PP: 104-109, 2008.
A. Munir, S. Ranka, and A. Gordon-Ross, “Highperformance energy-efficient multicore embedded computing,” IEEE Transactions on Parallel and Distributed Systems, vol. 23, no. 4, pp. 684–700, 2012.
H. Ghasemzadeh and R. Jafari, “Ultra low power signal processing in wearable monitoring systems: A tiered screening architecture with optimal bit resolution,” ACM Transactions in Embedded Computing Systems (TECS), vol. 9, no. 4, 2013.
J. L. March, J. Sahuquillo, S. Petit, H. Hassan, and J. Duato, “Power-aware scheduling with effective task migration for real-time multicore embedded systems,” Concurrency and Computation: Practice and Experience, 2012.
Sparsh Mittal, Jeffrey S. Vetter," A Survey of Methods For Analyzing and Improving GPU Energy Efficiency", ACM Computing Surveys, Vol. V, No. N, Article A, Publication date: January 2014.
Geoffrey Blake, Ronald G. Dreslinski, and Trevor Mudge," A Survey of Multicore Processors", IEEE SIGNAL PROCESSING MAGAZINE NOVEMBER 2009.
Er. Paramjeet kaur and Er.Nishi,"A Survey on CUDA" (IJCSIT) International Journal of Computer Science and Information Technologies, Vol. 5 (2), 2014, 2210-2214.
Li Tan, Shashank Kothapalli, Longxiang Chen, Omar Hussaini, Ryan Bissiri, Zizhong Chen, " A survey of power and energy efficient techniques for high performance numerical linear algebra operations", Parallel Computing 40 (2014) 559–573.
Crist´oba A.Navarro, NancyHitschfeld-Kahler and LuisMateu," A Survey on Parallel Computing and its Applications in Data-Parallel Problems Using GPU Architectures", Commun. Comput. Phys., Vol. 15, No. 2, pp. 285-329 February 2014.